An improved bit-plane and pass dual parallel architecture for coefficient bit modeling in JPEG2000.
https://doi.org/10.1145/1120725.1121044
@inproceedings{DBLP:conf/aspdac/HanXZ05,
author = {Yanju Han and
Chao Xu and
Yizhen Zhang},
editor = {Tingao Tang},
title = {An improved bit-plane and pass dual parallel architecture for coefficient
bit modeling in {JPEG2000}},
booktitle = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
{ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
pages = {1284--1287},
publisher = {{ACM} Press},
year = {2005},
url = {https://doi.org/10.1145/1120725.1121044},
doi = {10.1145/1120725.1121044},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HanXZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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