Register and thread structure optimization for GPUs.
https://doi.org/10.1109/ASPDAC.2013.6509639
@inproceedings{DBLP:conf/aspdac/LiangCRC13,
author = {Yun Liang and
Zheng Cui and
Kyle Rupnow and
Deming Chen},
title = {Register and thread structure optimization for GPUs},
booktitle = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2013, Yokohama, Japan, January 22-25, 2013},
pages = {461--466},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASPDAC.2013.6509639},
doi = {10.1109/ASPDAC.2013.6509639},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LiangCRC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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