A unified multi-corner multi-mode static timing analysis engine.
https://doi.org/10.1109/ASPDAC.2010.5419804
@inproceedings{DBLP:conf/aspdac/NianTH10,
author = {Jing{-}Jia Nian and
Shihgeng Tsai and
Chung{-}Yang (Ric) Huang},
title = {A unified multi-corner multi-mode static timing analysis engine},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {669--674},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419804},
doi = {10.1109/ASPDAC.2010.5419804},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/NianTH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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