VFCC: A verification framework of cache coherence using parallel simulation.
https://doi.org/10.1109/ASPDAC.2013.6509683
@inproceedings{DBLP:conf/aspdac/XiongYSXT13,
author = {Qiaoli Xiong and
Jiangfang Yi and
Tianbao Song and
Zichao Xie and
Dong Tong},
title = {{VFCC:} {A} verification framework of cache coherence using parallel
simulation},
booktitle = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2013, Yokohama, Japan, January 22-25, 2013},
pages = {705--710},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASPDAC.2013.6509683},
doi = {10.1109/ASPDAC.2013.6509683},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/XiongYSXT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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