Instruction cache locking using temporal reuse profile.
https://doi.org/10.1145/1837274.1837362
@inproceedings{DBLP:conf/dac/LiangM10,
author = {Yun Liang and
Tulika Mitra},
editor = {Sachin S. Sapatnekar},
title = {Instruction cache locking using temporal reuse profile},
booktitle = {Proceedings of the 47th Design Automation Conference, {DAC} 2010,
Anaheim, California, USA, July 13-18, 2010},
pages = {344--349},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1837274.1837362},
doi = {10.1145/1837274.1837362},
timestamp = {Fri, 27 Mar 2020 08:58:16 +0100},
biburl = {https://dblp.org/rec/conf/dac/LiangM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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