Multi-patch generation for multi-error logic rectification by interpolation with cofactor reduction.
https://doi.org/10.1109/DATE.2012.6176722
@inproceedings{DBLP:conf/date/TangHCH12,
author = {Kai{-}Fu Tang and
Po{-}Kai Huang and
Chun{-}Nan Chou and
Chung{-}Yang Huang},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Multi-patch generation for multi-error logic rectification by interpolation
with cofactor reduction},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1567--1572},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176722},
doi = {10.1109/DATE.2012.6176722},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/TangHCH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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