An Efficient Hardware Accelerator for Sparse Convolutional Neural Networks on FPGAs.
https://doi.org/10.1109/FCCM.2019.00013
@inproceedings{DBLP:conf/fccm/LuXHZL019,
author = {Liqiang Lu and
Jiaming Xie and
Ruirui Huang and
Jiansong Zhang and
Wei Lin and
Yun Liang},
title = {An Efficient Hardware Accelerator for Sparse Convolutional Neural
Networks on FPGAs},
booktitle = {27th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2019, San Diego, CA, USA, April 28 - May
1, 2019},
pages = {17--25},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FCCM.2019.00013},
doi = {10.1109/FCCM.2019.00013},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/fccm/LuXHZL019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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