Speedy: An Accelerator for Sparse Convolutional Neural Networks on FPGAs.
https://doi.org/10.1145/3289602.3293970
@inproceedings{DBLP:conf/fpga/Lu0HLCZ19,
author = {Liqiang Lu and
Yun Liang and
Ruirui Huang and
Wei Lin and
Xiaoyuan Cui and
Jiansong Zhang},
editor = {Kia Bazargan and
Stephen Neuendorffer},
title = {Speedy: An Accelerator for Sparse Convolutional Neural Networks on
FPGAs},
booktitle = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019},
pages = {187},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3289602.3293970},
doi = {10.1145/3289602.3293970},
timestamp = {Tue, 05 Mar 2019 07:04:43 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Lu0HLCZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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