Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks.
https://doi.org/10.1145/2684746.2689060
@inproceedings{DBLP:conf/fpga/ZhangLSGXC15,
author = {Chen Zhang and
Peng Li and
Guangyu Sun and
Yijin Guan and
Bingjun Xiao and
Jason Cong},
editor = {George A. Constantinides and
Deming Chen},
title = {Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural
Networks},
booktitle = {Proceedings of the 2015 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Monterey, CA, USA, February 22-24, 2015},
pages = {161--170},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2684746.2689060},
doi = {10.1145/2684746.2689060},
timestamp = {Wed, 22 Jan 2020 14:30:11 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZhangLSGXC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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