Coordinated static and dynamic cache bypassing for GPUs.


https://doi.org/10.1109/HPCA.2015.7056023
@inproceedings{DBLP:conf/hpca/XieLWSW15, author = {Xiaolong Xie and Yun Liang and Yu Wang and Guangyu Sun and Tao Wang}, title = {Coordinated static and dynamic cache bypassing for GPUs}, booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture, {HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015}, pages = {76--88}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/HPCA.2015.7056023}, doi = {10.1109/HPCA.2015.7056023}, timestamp = {Mon, 16 Dec 2019 13:26:25 +0100}, biburl = {https://dblp.org/rec/conf/hpca/XieLWSW15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }

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