Accelerate FPGA Routing with Parallel Recursive Partitioning.
https://doi.org/10.1109/ICCAD.2015.7372558
@inproceedings{DBLP:conf/iccad/ShenL15,
author = {Minghua Shen and
Guojie Luo},
editor = {Diana Marculescu and
Frank Liu},
title = {Accelerate {FPGA} Routing with Parallel Recursive Partitioning},
booktitle = {Proceedings of the {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2015, Austin, TX, USA, November 2-6, 2015},
pages = {118--125},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ICCAD.2015.7372558},
doi = {10.1109/ICCAD.2015.7372558},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iccad/ShenL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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