Design space exploration of multiple loops on FPGAs using high level synthesis.
https://doi.org/10.1109/ICCD.2014.6974719
@inproceedings{DBLP:conf/iccd/ZhongVLMN14,
author = {Guanwen Zhong and
Vanchinathan Venkataramani and
Yun Liang and
Tulika Mitra and
Sma{\"{\i}}l Niar},
title = {Design space exploration of multiple loops on FPGAs using high level
synthesis},
booktitle = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014,
Seoul, South Korea, October 19-22, 2014},
pages = {456--463},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ICCD.2014.6974719},
doi = {10.1109/ICCD.2014.6974719},
timestamp = {Fri, 27 Mar 2020 08:54:54 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ZhongVLMN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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