Rapid design space exploration of two-level unified caches.
https://doi.org/10.1109/ISCAS.2014.6865540
@inproceedings{DBLP:conf/iscas/DengLLS14,
author = {Jingyu Deng and
Yun Liang and
Guojie Luo and
Guangyu Sun},
title = {Rapid design space exploration of two-level unified caches},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {1937--1940},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865540},
doi = {10.1109/ISCAS.2014.6865540},
timestamp = {Mon, 16 Dec 2019 13:26:25 +0100},
biburl = {https://dblp.org/rec/conf/iscas/DengLLS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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