A high speed and efficient architecture of VLD for AVS HD video decoder.


https://doi.org/10.1109/PCS.2012.6213316
@inproceedings{DBLP:conf/pcs/LiuYJX12, author = {Yutong Liu and Zhenqiang Yang and Huizhu Jia and Don Xie}, editor = {Marek Domanski and Tomasz Grajek and Damian Karwowski and Ryszard Stasinski}, title = {A high speed and efficient architecture of {VLD} for {AVS} {HD} video decoder}, booktitle = {2012 Picture Coding Symposium, {PCS} 2012, Krakow, Poland, May 7-9, 2012}, pages = {377--380}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/PCS.2012.6213316}, doi = {10.1109/PCS.2012.6213316}, timestamp = {Wed, 16 Oct 2019 14:14:56 +0200}, biburl = {https://dblp.org/rec/conf/pcs/LiuYJX12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }

本页面没有标签
本页面最近更新:2020/05/21更新历史
发现错误?想一起完善? 在 GitHub 上编辑此页!
本页面的全部内容在 CC BY-SA 4.0 SATA 协议之条款下提供,附加条款亦可能应用

Copyright © 2016 - 2020 PKU Scholar

最近更新: 52aade4, 2020-05-21