Memory interface design for AVS HD video encoder with Level C+ coding order.
https://doi.org/10.1587/elex.14.20170501
@article{DBLP:journals/ieiceee/HuangWXJX17,
author = {Xiaofeng Huang and
Kaijin Wei and
Guoqing Xiang and
Huizhu Jia and
Don Xie},
title = {Memory interface design for {AVS} {HD} video encoder with Level {C+}
coding order},
journal = {{IEICE} Electronic Express},
volume = {14},
number = {12},
pages = {20170501},
year = {2017},
url = {https://doi.org/10.1587/elex.14.20170501},
doi = {10.1587/elex.14.20170501},
timestamp = {Wed, 13 Sep 2017 15:30:40 +0200},
biburl = {https://dblp.org/rec/journals/ieiceee/HuangWXJX17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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