Fast algorithms and VLSI architecture design for HEVC intra-mode decision.
https://doi.org/10.1007/s11554-015-0549-8
@article{DBLP:journals/jrtip/HuangJCZLYX016,
author = {Xiaofeng Huang and
Huizhu Jia and
Binbin Cai and
Chuang Zhu and
Jie Liu and
Mingyuan Yang and
Don Xie and
Wen Gao},
title = {Fast algorithms and {VLSI} architecture design for {HEVC} intra-mode
decision},
journal = {J. Real-Time Image Processing},
volume = {12},
number = {2},
pages = {285--302},
year = {2016},
url = {https://doi.org/10.1007/s11554-015-0549-8},
doi = {10.1007/s11554-015-0549-8},
timestamp = {Thu, 16 Apr 2020 12:14:55 +0200},
biburl = {https://dblp.org/rec/journals/jrtip/HuangJCZLYX016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}