Instruction Cache Locking Using Temporal Reuse Profile.
https://doi.org/10.1109/TCAD.2015.2418320
@article{DBLP:journals/tcad/LiangMJ15,
author = {Yun Liang and
Tulika Mitra and
Lei Ju},
title = {Instruction Cache Locking Using Temporal Reuse Profile},
journal = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
volume = {34},
number = {9},
pages = {1387--1400},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2418320},
doi = {10.1109/TCAD.2015.2418320},
timestamp = {Fri, 27 Mar 2020 08:44:31 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiangMJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
本页面没有标签