An Ultrasynchronization Checking Method With Trace-Driven Simulation for Fast and Accurate MPSoC Virtual Platform Simulation.


https://doi.org/10.1109/TCAD.2013.2241177
@article{DBLP:journals/tcad/YehLH13, author = {Yu{-}Fu Yeh and Hsin{-}Cheng Lin and Chung{-}Yang Huang}, title = {An Ultrasynchronization Checking Method With Trace-Driven Simulation for Fast and Accurate MPSoC Virtual Platform Simulation}, journal = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems}, volume = {32}, number = {6}, pages = {928--939}, year = {2013}, url = {https://doi.org/10.1109/TCAD.2013.2241177}, doi = {10.1109/TCAD.2013.2241177}, timestamp = {Sat, 20 May 2017 00:23:47 +0200}, biburl = {https://dblp.org/rec/journals/tcad/YehLH13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }

本页面没有标签
本页面最近更新:2020/05/21更新历史
发现错误?想一起完善? 在 GitHub 上编辑此页!
本页面的全部内容在 CC BY-SA 4.0 SATA 协议之条款下提供,附加条款亦可能应用

Copyright © 2016 - 2020 PKU Scholar

最近更新: 52aade4, 2020-05-21