An AVS HDTV video decoder architecture employing efficient HW/SW partitioning.
https://doi.org/10.1109/TCE.2006.273169
@article{DBLP:journals/tce/JiaZXG06,
author = {Huizhu Jia and
Peng Zhang and
Don Xie and
Wen Gao},
title = {An {AVS} {HDTV} video decoder architecture employing efficient {HW/SW}
partitioning},
journal = {{IEEE} Trans. Consumer Electronics},
volume = {52},
number = {4},
pages = {1447--1453},
year = {2006},
url = {https://doi.org/10.1109/TCE.2006.273169},
doi = {10.1109/TCE.2006.273169},
timestamp = {Sun, 28 May 2017 13:20:37 +0200},
biburl = {https://dblp.org/rec/journals/tce/JiaZXG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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