A 40 Gb/s PAM-4 Receiver with 2-Tap DFE Based on Automatically Non-Even Level Tracking.
https://doi.org/10.1109/ASSCC.2018.8579300
@inproceedings{DBLP:conf/asscc/HungHC18,
author = {Chia{-}Tse Hung and
Yu{-}Ping Huang and
Wei{-}Zen Chen},
title = {A 40 Gb/s {PAM-4} Receiver with 2-Tap {DFE} Based on Automatically
Non-Even Level Tracking},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2018, Tainan,
Taiwan, November 5-7, 2018},
pages = {213--214},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ASSCC.2018.8579300},
doi = {10.1109/ASSCC.2018.8579300},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/asscc/HungHC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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