A 10Gbps, 1.24pJ/bit, burst-mode clock and data recovery with jitter suppression.
https://doi.org/10.1109/CICC.2013.6658469
@inproceedings{DBLP:conf/cicc/SuCWCLJ13,
author = {Ming{-}Chiuan Su and
Wei{-}Zen Chen and
Pei{-}Si Wu and
Yu{-}Hsian Chen and
Chao{-}Cheng Lee and
Shyh{-}Jye Jou},
title = {A 10Gbps, 1.24pJ/bit, burst-mode clock and data recovery with jitter
suppression},
booktitle = {Proceedings of the {IEEE} 2013 Custom Integrated Circuits Conference,
{CICC} 2013, San Jose, CA, USA, September 22-25, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CICC.2013.6658469},
doi = {10.1109/CICC.2013.6658469},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/SuCWCLJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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