An automatic synthesis tool for nanometer low dropout regulator using simulation based model and geometric programming.
https://doi.org/10.1109/VLSI-DAT.2014.6834871
@inproceedings{DBLP:conf/vlsi-dat/HsuCZLPC14,
author = {Shih{-}Hsin Hsu and
Wei{-}Zen Chen and
Jui{-}Pin Zheng and
Sean S.{-}Y. Liu and
Po{-}Cheng Pan and
Hung{-}Ming Chen},
title = {An automatic synthesis tool for nanometer low dropout regulator using
simulation based model and geometric programming},
booktitle = {Technical Papers of 2014 International Symposium on {VLSI} Design,
Automation and Test, {VLSI-DAT} 2014, Hsinchu, Taiwan, April 28-30,
2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/VLSI-DAT.2014.6834871},
doi = {10.1109/VLSI-DAT.2014.6834871},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/HsuCZLPC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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